Intellectual Property India Publishes Patent Application for Dual Side Cut Staggered Stacked Field Effect Transistor

MUMBAI, India, July 7 -- Intellectual Property India has published a patent application (202617069658 A) filed by International Business Machines on June 03, 2026, for Dual Side Cut Staggered Stacked Field Effect Transistor.

Inventors include Xie, Ruilong; Zhang, Chen; Wang, Junli; and Choi, Kisik.

The application for the patent was published on July 03, 2026, under issue no. 27/2026.

Abstract: According to the embodiment of the present invention, a semiconductor device includes a plurality of nanodevices (ND1, ND2) including a plurality of upper transistors and a plurality of lower transistors. The plurality of nanodevices include an upper active region (135, 140, 145) and a lower active region (120, 125) that are offset from each other...