Intellectual Property India Publishes Patent Application for Clock Frequency Deviation Detector With Closed-Loop Calibration

MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202547069396 A) filed by Qualcomm Incorporated on July 21, 2025, for Clock Frequency Deviation Detector With Closed-Loop Calibration.

Inventors include Pang, Bo; Weil, Andrew; Kusbit, Matthew Chauncey; Elhebeary, Mahmoud Number; Griffitts, Benjamin; and Quan, Xiaohong.

The application for the patent was published on July 17, 2026, under issue no. 29/2026.

Abstract: An apparatus (100), including: a switched capacitor (110) configured to generate a switched capacitor voltage (Vcap) based on an input clock signal (fin) and a current (Idac); a current digital-to-analog converter, DAC, (105) configured to generate the current based on a first digital sig...