Intellectual Property India Publishes Patent Application for An Adaptive Fpga – Based Image Noise Detection And Reduction System For Real Time Vision Applications

MUMBAI, India, Nov. 13 -- Intellectual Property India has published a patent application (202641125293 A) filed by K. S. Rangasamy College Of Technology on October 21, 2026, for An Adaptive Fpga – Based Image Noise Detection And Reduction System For Real Time Vision Applications.

Inventors include Mrs. C. Saranya; Dr. P. Kumar; Dr. S. Gomathi; Dr. S. Pradeep; Ms. R. Ramya; Ms. M. Harini; and Ms. G. M. Janani.

The application for the patent was published on November 13, 2026, under issue no. 46/2026.

Abstract: The invention proposes an Adaptive FPGA-Based Image Noise Detection and Reduction System for real-time vision applications. It addresses the limitations of conventional denoising methods that rely on fixed or manually selected filte...