MUMBAI, India, May 29 -- Intellectual Property India has published a patent application (202611053021 A) filed by Bhavya Gautam; and Dr Mithileysh Sathiyanarayanan, New Delhi, on April 25, for 'enhanced five-stage pipelined risc-v processor with integrated iot-based hazard mitigation system.'
Inventor(s) include Bhavya Gautam; and Dr Mithileysh Sathiyanarayanan.
The application for the patent was published on May 29, under issue no. 22/2026.
According to the abstract released by the Intellectual Property India: "The invention relates to a 32-bit RISC-V compatible processor implementing a five-stage pipeline architecture (instruction fetch, instruction decode, execution, memory access, and writeback) with an integrated IoT-based hazard de...