Intellectual Property India Publishes Patent Application for 'An Automated Verification System For System-On-Chip Designs And Method Thereof' Filed by Delhi Technological University

MUMBAI, India, Jan. 23 -- Intellectual Property India has published a patent application (202511125795 A) filed by Delhi Technological University, New Delhi, on Dec. 12, 2025, for 'an automated verification system for system-on-chip designs and method thereof.'

Inventor(s) include Kapoor, Rajiv; Dash, Ajay; Kapoor, Aarchishya; and Kapoor, Ruchirangad.

The application for the patent was published on Jan. 23, under issue no. 04/2026.

According to the abstract released by the Intellectual Property India: "An automated verification system (100) and method (200) for System-on-Chip (SoC) modules are disclosed. The system (100) includes a generation layer module (110) to generate design artifacts comprising module descriptions, code snippets, a...