US Patent Issued to Hewlett Packard Enterprise Development on Oct. 20 for "Automatic scaling of microservices applications" (California Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,544, issued on Oct. 20, was assigned to Hewlett Packard Enterprise Development LP (Spring, Texas). "Automatic scaling of microservices appl... Read More

US Patent Issued to Intel on Oct. 20 for "Configurable pipeline to provide non-systolic and systolic outputs in calculation" (American, Chinese Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,545, issued on Oct. 20, was assigned to Intel Corp. (Santa Clara, Calif.). "Configurable pipeline to provide non-systolic and systolic outp... Read More

US Patent Issued to Microchip Technology on Oct. 20 for "Methods for gather/scatter operations in a vector processor" (California Inventor)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,546, issued on Oct. 20, was assigned to Microchip Technology (Chandler, Ariz.). "Methods for gather/scatter operations in a vector processo... Read More

US Patent Issued to ANDES TECHNOLOGY on Oct. 20 for "Vector processing circuit and vector processing method with reused calculation circuit" (Taiwanese, American Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,547, issued on Oct. 20, was assigned to ANDES TECHNOLOGY Corp. (Hsinchu City, Taiwan). "Vector processing circuit and vector processing met... Read More

US Patent Issued to NVIDIA on Oct. 20 for "Memory modification technique using metrics" (Oregon Inventor)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,548, issued on Oct. 20, was assigned to NVIDIA Corp. (Santa Clara, Calif.). "Memory modification technique using metrics" was invented by D... Read More

US Patent Issued to Arm on Oct. 20 for "Synchronization of predetermined class of load/store operations" (British, Indian Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,549, issued on Oct. 20, was assigned to Arm Ltd. (Cambridge, Great Britain). "Synchronization of predetermined class of load/store operatio... Read More

US Patent Issued to QUALCOMM on Oct. 20 for "Processor that mitigates side channel attacks by refraining from allocating an entry in a data TLB for a missing load address when the load address misses both in a data cache memory and in the data TLB and the load address specifies a location without a valid address translation or without permission to read from the location" (California, Texas Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,550, issued on Oct. 20, was assigned to QUALCOMM Inc. (San Diego). "Processor that mitigates side channel attacks by refraining from alloca... Read More

US Patent Issued to QUALCOMM on Oct. 20 for "Dynamically reconfiguring an out-of-order processing circuit in a processing unit to process instructions in order based on power consumption of a workload" (Indian Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,551, issued on Oct. 20, was assigned to QUALCOMM Inc. (San Diego). "Dynamically reconfiguring an out-of-order processing circuit in a proce... Read More

US Patent Issued to GOOGLE on Oct. 20 for "Machine-learned model alignment with synthetic data" (California, New York Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,552, issued on Oct. 20, was assigned to GOOGLE LLC (Mountain View, Calif.). "Machine-learned model alignment with synthetic data" was inven... Read More

US Patent Issued to TEXAS INSTRUMENTS on Oct. 20 for "Multi-condition branch instruction for conditional branch operations" (Australian, Indian Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,553, issued on Oct. 20, was assigned to TEXAS INSTRUMENTS Inc. (Dallas). "Multi-condition branch instruction for conditional branch operati... Read More

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